A Framework for Sensitivity Analysis of Real-Time Power Hardware-in-the-Loop (PHIL) Systems

A Framework for Sensitivity Analysis of Real-Time Power Hardware-in-the-Loop (PHIL) Systems

Power hardware-in-the-loop (PHIL) simulation leverages the advanced real-time emulation based technique to carry out in-depth investigations on novel real-world power components. Power amplifiers, sensors, and signal conversion units based power interfaces (PI) incorporate physical hardware systems...

Ausführliche Beschreibung

Bibliographische Detailangaben
Hauptverfasser: Georg Lauss, Zhiwang Feng, Mazheruddin H. Syed, Alkistis Kontou, Antonio De Paola, Alexandros Paspatis, Panos Kotsampopoulos
Format: Artikel
Sprache:English
Veröffentlicht: IEEE 2022-01-01
Schriftenreihe:IEEE Access
Schlagworte:
Power hardware-in-the-loop (PHIL) simulation systems
sensitivity analysis
power interface
system modelling
system theory
control systems
Online Zugang:https://ieeexplore.ieee.org/document/9893124/

Online

https://ieeexplore.ieee.org/document/9893124/

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