Twofold Sparsity: Joint Bit- and Network-Level Sparsity for Energy-Efficient Deep Neural Network Using RRAM Based Compute-In-Memory
On-device intelligence and AI-powered edge devices require compressed deep learning algorithm and energy efficient hardware. Compute-in-memory (CIM) architecture is a more suitable candidate than traditional Complementary Metal-Oxide-Semiconductor (CMOS) technology for deep learning applications sin...
Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
IEEE
2024-01-01
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Series: | IEEE Access |
Subjects: | |
Online Access: | https://ieeexplore.ieee.org/document/10459196/ |