Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

In this paper, a fully logic compatible via diode is developed for high-density resistive random access memory (RRAM) array applications. This novel via diode is realized by advanced 28nm CMOS technology with Cu damascene via. The device is stacked between a top Cu via and a bottom Cu metal with a c...

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Bibliographic Details
Main Authors: Yu-Cheng Liao, Hsin-Wei Pan, Min-Che Hsieh, Tzong-Sheng Chang, Yu-Der Chih, Ming-Jinn Tsai, Chrong Jung Lin, Ya-Chin King
Format: Article
Language:English
Published: IEEE 2014-01-01
Series:IEEE Journal of the Electron Devices Society
Online Access:https://ieeexplore.ieee.org/document/6857314/

Internet

https://ieeexplore.ieee.org/document/6857314/

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