Implementación del algoritmo Threefish-256 en hardware reconfigurable
This article presents both the description and results of the Threefish cryptographic algorithm hardware implementation for encryption process. The implementation of the algorithm was performed by using the iterative round architecture on the FPGA (Field Programmable Gate Array) Virtex-...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Universidad Santo Tomás
2014-12-01
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| Series: | Iteckne |
| Subjects: | |
| Online Access: | http://revistas.ustabuca.edu.co/index.php/ITECKNE/article/view/725 |