Low power and compact architecture of sector transition reduction encoding technique

Today's high-speed technologies are integrating many millions of transistors in a chip by the processes of the Deep-Submicron (DSM) fabrication. The trend leads to an increase in die size and a decrease in the horizontal dimensions of devices and interconnections. Power consumption is the domin...

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Bibliographic Details
Main Authors: J. Sneha Latha, Chintaiah Nannepaga, Katepogu Rajkumar, Bujjibabu Nannepaga, Kranthi Kumar Andhe
Format: Article
Language:English
Published: Elsevier 2023-12-01
Series:e-Prime: Advances in Electrical Engineering, Electronics and Energy
Subjects:
Online Access:http://www.sciencedirect.com/science/article/pii/S2772671123001924