Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
Abstract This paper proposes a common‐mode voltage injection‐based pulse width modulation strategy to optimize the AC current ripple of parallel interleaved converters. In general, modulation methods entail a trade‐off between switching times and voltage error. Given the redundancy in the available...
Main Authors: | , , , , |
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Format: | Article |
Language: | English |
Published: |
Wiley
2021-07-01
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Series: | IET Power Electronics |
Subjects: | |
Online Access: | https://doi.org/10.1049/pel2.12047 |