Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections

Abstract This paper proposes a common‐mode voltage injection‐based pulse width modulation strategy to optimize the AC current ripple of parallel interleaved converters. In general, modulation methods entail a trade‐off between switching times and voltage error. Given the redundancy in the available...

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Main Authors: Shengfu Liu, Xiaoliang Jin, Wen Shi, Huan Yang, Rongxiang Zhao
Format: Article
Language:English
Published: Wiley 2021-07-01
Series:IET Power Electronics
Subjects:
Online Access:https://doi.org/10.1049/pel2.12047
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author Shengfu Liu
Xiaoliang Jin
Wen Shi
Huan Yang
Rongxiang Zhao
author_facet Shengfu Liu
Xiaoliang Jin
Wen Shi
Huan Yang
Rongxiang Zhao
author_sort Shengfu Liu
collection DOAJ
description Abstract This paper proposes a common‐mode voltage injection‐based pulse width modulation strategy to optimize the AC current ripple of parallel interleaved converters. In general, modulation methods entail a trade‐off between switching times and voltage error. Given the redundancy in the available vector sequences, we sequentially minimize the switching times and the voltage error. Specifically, we propose eight candidate vector sequences with minimized switching times for each 60° sector. Then, we quantitate the current ripple introduced by the eight vector sequences, and according to the calculations, we split each 60° sector into eight subsectors, each employs the respectively optimal vector sequence with the minimized current ripple. For implementation, the candidate vector sequences are further unified by a common‐mode voltage injection scheme. The injection depends on the momentary subsector in which the reference lies. Despite the complex geometry of the subsectors, we propose a simple decision procedure that can be easily implemented in mainstream microcontrollers. Compared to the conventional methods, the proposed common‐mode voltage injection‐based pulse width modulation has a smaller AC current ripple at the same switching loss. The experimental results verify the theoretical analysis and the effectiveness of the proposed common‐mode voltage injection‐based pulse width modulation strategy.
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spelling doaj.art-da1627a9f1f546fcb90c60fc85b1ca642022-12-22T04:33:22ZengWileyIET Power Electronics1755-45351755-45432021-07-011491577159110.1049/pel2.12047Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injectionsShengfu Liu0Xiaoliang Jin1Wen Shi2Huan Yang3Rongxiang Zhao4College of Electrical Engineering Zhejiang University Hangzhou P. R. ChinaCollege of Electrical Engineering Zhejiang University Hangzhou P. R. ChinaCollege of Electrical Engineering Zhejiang University Hangzhou P. R. ChinaCollege of Electrical Engineering Zhejiang University Hangzhou P. R. ChinaCollege of Electrical Engineering Zhejiang University Hangzhou P. R. ChinaAbstract This paper proposes a common‐mode voltage injection‐based pulse width modulation strategy to optimize the AC current ripple of parallel interleaved converters. In general, modulation methods entail a trade‐off between switching times and voltage error. Given the redundancy in the available vector sequences, we sequentially minimize the switching times and the voltage error. Specifically, we propose eight candidate vector sequences with minimized switching times for each 60° sector. Then, we quantitate the current ripple introduced by the eight vector sequences, and according to the calculations, we split each 60° sector into eight subsectors, each employs the respectively optimal vector sequence with the minimized current ripple. For implementation, the candidate vector sequences are further unified by a common‐mode voltage injection scheme. The injection depends on the momentary subsector in which the reference lies. Despite the complex geometry of the subsectors, we propose a simple decision procedure that can be easily implemented in mainstream microcontrollers. Compared to the conventional methods, the proposed common‐mode voltage injection‐based pulse width modulation has a smaller AC current ripple at the same switching loss. The experimental results verify the theoretical analysis and the effectiveness of the proposed common‐mode voltage injection‐based pulse width modulation strategy.https://doi.org/10.1049/pel2.12047Voltage controlCurrent controlControl of electric power systemsDC‐AC power convertors (invertors)Power convertors and power supplies to apparatus
spellingShingle Shengfu Liu
Xiaoliang Jin
Wen Shi
Huan Yang
Rongxiang Zhao
Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
IET Power Electronics
Voltage control
Current control
Control of electric power systems
DC‐AC power convertors (invertors)
Power convertors and power supplies to apparatus
title Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
title_full Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
title_fullStr Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
title_full_unstemmed Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
title_short Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections
title_sort line current ripple reduction of two paralleled three phase two level converter using optimized common mode voltage injections
topic Voltage control
Current control
Control of electric power systems
DC‐AC power convertors (invertors)
Power convertors and power supplies to apparatus
url https://doi.org/10.1049/pel2.12047
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