Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks

Sparse and dense matrix multiplication hardware for heterogeneous multi-precision neural networks

In this paper, we present hardware accelerators created with high-level synthesis techniques for sparse and dense matrix multiplication operations. The cores can operate with different precisions and are designed to be integrated in a heterogeneous CPU-FPGA system for Edge AI applications. The metho...

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Bibliographic Details
Main Authors: Jose Nunez-Yanez, Mohammad Hosseinabady
Format: Article
Language:English
Published: Elsevier 2021-12-01
Series:Array
Subjects:
Neural network
FPGA
Quantization
Pruning
Matrix multiplication acceleration
Convolution
Online Access:http://www.sciencedirect.com/science/article/pii/S259000562100045X

Internet

http://www.sciencedirect.com/science/article/pii/S259000562100045X

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