Design of a 0.4 V, 8.43 ENOB, 5.29 nW, 2 kS/s SAR ADC for Implantable Devices

Design of a 0.4 V, 8.43 ENOB, 5.29 nW, 2 kS/s SAR ADC for Implantable Devices

This paper presents a 9-bit differential, minimum-powered, successive approximation register (SAR) ADC intended for implantable devices or sensors. Such applications demand nanowatt-range power consumption, which is achieved by designing the SAR ADC with a proposed bootstrap switch, bespoke split-ca...

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Bibliographic Details
Main Authors: Posani Vijaya Lakshmi, Sarada Musala, Avireni Srinivasulu, Cristian Ravariu
Format: Article
Language:English
Published: MDPI AG 2023-11-01
Series:Electronics
Subjects:
implantable devices
low-power electronics
SAR ADC
CMOS circuits
bootstrap switch
linearity errors
Online Access:https://www.mdpi.com/2079-9292/12/22/4691

Internet

https://www.mdpi.com/2079-9292/12/22/4691

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