High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits

High Performance and Low power Monolithic Three-Dimensional Sub-50 nm Poly Si Thin film transistor (TFTs) Circuits

Abstract Development of manufacture trend for TFTs technologies has focused on improving electrical properties of films with the cost reduction to achieve commercialization. To achieve this goal, high-performance sub-50 nm TFTs-based MOSFETs with ON-current (Ion)/subthreshold swing (S.S.) of 181 µA/...

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Bibliographic Details
Main Authors: Tsung-Ta Wu, Wen-Hsien Huang, Chih-Chao Yang, Hung-Chun Chen, Tung-Ying Hsieh, Wei-Sheng Lin, Ming-Hsuan Kao, Chiu-Hao Chen, Jie-Yi Yao, Yi-Ling Jian, Chiung-Chih Hsu, Kun-Lin Lin, Chang-Hong Shen, Yu-Lun Chueh, Jia-Min Shieh
Format: Article
Language:English
Published: Nature Portfolio 2017-05-01
Series:Scientific Reports
Online Access:https://doi.org/10.1038/s41598-017-01012-y

Internet

https://doi.org/10.1038/s41598-017-01012-y

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