Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application
We fabricated Al/Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub>/Si and Al/HfO<sub>2</sub>/Si structures to optimize the passivation layer of a backside-illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS), with the key prope...
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IEEE
2023-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10154031/ |
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| author | Jongseo Park Kyeong-Keun Choi Jehyun An Bohyeon Kang Hyeonseo You Giryun Hong Sung-Min Ahn Rock-Hyun Baek |
| author_facet | Jongseo Park Kyeong-Keun Choi Jehyun An Bohyeon Kang Hyeonseo You Giryun Hong Sung-Min Ahn Rock-Hyun Baek |
| author_sort | Jongseo Park |
| collection | DOAJ |
| description | We fabricated Al/Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub>/Si and Al/HfO<sub>2</sub>/Si structures to optimize the passivation layer of a backside-illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS), with the key properties of the newly developed high-<inline-formula> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula> passivation layer analyzed via border traps, interface traps, and fixed charges. In the first experiment using Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub> bilayer-based structures, different thicknesses of SiO<sub>2</sub> were applied from 0 to 15 nm. The improvement in their properties was confirmed by applying forming gas annealing (FGA), a type of post-treatment, to all experimental systems. The first experiment results indicated that both the SiO<sub>2</sub> layer and FGA were effective for chemical passivation. However, a tradeoff occurred in the degree of improvement of the interface trap density (<inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula>) and fixed-charge density (<inline-formula> <tex-math notation="LaTeX">$\text{Q}_{\mathrm {f}}$ </tex-math></inline-formula>) according to the SiO<sub>2</sub> layer thickness. Subsequently, in the second experiment using HfO<sub>2</sub> single-layer-based structures, FGA improved the border trap to a relatively poor extent compared to the first experiment. Nevertheless, FGA improved the electrical characteristics of the HfO<sub>2</sub> films without any side effects and results in optimal <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\vert \text{Q}_{\mathrm {f}}/\text{q}\vert $ </tex-math></inline-formula> values of <inline-formula> <tex-math notation="LaTeX">$2.59 \times 10^{11}$ </tex-math></inline-formula> eV<inline-formula> <tex-math notation="LaTeX">$^{-1}$ </tex-math></inline-formula> cm<inline-formula> <tex-math notation="LaTeX">$^{-2}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$1.00 \times 10^{12}$ </tex-math></inline-formula> cm<inline-formula> <tex-math notation="LaTeX">$^{-2}$ </tex-math></inline-formula>, respectively, demonstrating its potential for the passivation layer in BSI CIS applications. |
| first_indexed | 2024-03-11T12:03:06Z |
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| language | English |
| last_indexed | 2024-03-11T12:03:06Z |
| publishDate | 2023-01-01 |
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| spelling | doaj.art-e07b7f67fbd54e48a5593a29775e33d92023-11-08T00:01:38ZengIEEEIEEE Access2169-35362023-01-0111606606066710.1109/ACCESS.2023.328697610154031Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor ApplicationJongseo Park0https://orcid.org/0000-0003-2881-5650Kyeong-Keun Choi1https://orcid.org/0000-0002-4950-757XJehyun An2https://orcid.org/0000-0002-7008-6087Bohyeon Kang3https://orcid.org/0000-0001-8460-698XHyeonseo You4https://orcid.org/0000-0001-6008-5091Giryun Hong5https://orcid.org/0009-0003-9657-0744Sung-Min Ahn6https://orcid.org/0000-0001-7799-5374Rock-Hyun Baek7https://orcid.org/0000-0002-6175-8101Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaNational Institute for Nanomaterials Technology (NINT), Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaDepartment of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of KoreaWe fabricated Al/Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub>/Si and Al/HfO<sub>2</sub>/Si structures to optimize the passivation layer of a backside-illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS), with the key properties of the newly developed high-<inline-formula> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula> passivation layer analyzed via border traps, interface traps, and fixed charges. In the first experiment using Al<sub>2</sub>O<sub>3</sub>/SiO<sub>2</sub> bilayer-based structures, different thicknesses of SiO<sub>2</sub> were applied from 0 to 15 nm. The improvement in their properties was confirmed by applying forming gas annealing (FGA), a type of post-treatment, to all experimental systems. The first experiment results indicated that both the SiO<sub>2</sub> layer and FGA were effective for chemical passivation. However, a tradeoff occurred in the degree of improvement of the interface trap density (<inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula>) and fixed-charge density (<inline-formula> <tex-math notation="LaTeX">$\text{Q}_{\mathrm {f}}$ </tex-math></inline-formula>) according to the SiO<sub>2</sub> layer thickness. Subsequently, in the second experiment using HfO<sub>2</sub> single-layer-based structures, FGA improved the border trap to a relatively poor extent compared to the first experiment. Nevertheless, FGA improved the electrical characteristics of the HfO<sub>2</sub> films without any side effects and results in optimal <inline-formula> <tex-math notation="LaTeX">$\text{D}_{\mathrm {it}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$\vert \text{Q}_{\mathrm {f}}/\text{q}\vert $ </tex-math></inline-formula> values of <inline-formula> <tex-math notation="LaTeX">$2.59 \times 10^{11}$ </tex-math></inline-formula> eV<inline-formula> <tex-math notation="LaTeX">$^{-1}$ </tex-math></inline-formula> cm<inline-formula> <tex-math notation="LaTeX">$^{-2}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">$1.00 \times 10^{12}$ </tex-math></inline-formula> cm<inline-formula> <tex-math notation="LaTeX">$^{-2}$ </tex-math></inline-formula>, respectively, demonstrating its potential for the passivation layer in BSI CIS applications.https://ieeexplore.ieee.org/document/10154031/Plasma-enhanced atomic layer depositionforming gas annealingCMOS image sensorsurface passivationSiO₂HfO₂ |
| spellingShingle | Jongseo Park Kyeong-Keun Choi Jehyun An Bohyeon Kang Hyeonseo You Giryun Hong Sung-Min Ahn Rock-Hyun Baek Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application IEEE Access Plasma-enhanced atomic layer deposition forming gas annealing CMOS image sensor surface passivation SiO₂ HfO₂ |
| title | Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application |
| title_full | Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application |
| title_fullStr | Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application |
| title_full_unstemmed | Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application |
| title_short | Curing Process on Passivation Layer for Backside-Illuminated CMOS Image Sensor Application |
| title_sort | curing process on passivation layer for backside illuminated cmos image sensor application |
| topic | Plasma-enhanced atomic layer deposition forming gas annealing CMOS image sensor surface passivation SiO₂ HfO₂ |
| url | https://ieeexplore.ieee.org/document/10154031/ |
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