Breaking Masked Implementations with Many Shares on 32-bit Software Platforms
We explore the concrete side-channel security provided by state-of-theart higher-order masked software implementations of the AES and the (candidate to the NIST Lightweight Cryptography competition) Clyde, in ARM Cortex-M0 and M3 devices. Rather than looking for possibly reduced security orders (as...
Main Authors: | , |
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Format: | Article |
Language: | English |
Published: |
Ruhr-Universität Bochum
2021-07-01
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Series: | Transactions on Cryptographic Hardware and Embedded Systems |
Subjects: | |
Online Access: | https://tches.iacr.org/index.php/TCHES/article/view/8973 |