Germanium on Insulator Fabrication for Monolithic 3-D Integration

Germanium on Insulator Fabrication for Monolithic 3-D Integration

A low temperature (T<sub>max</sub> = 350 &#x00B0;C) process for Germanium (Ge) on insulator (GOI) substrate fabrication with thicknesses of less than 25 nm is reported in this paper. The process is based on a single step epitaxial growth of a Ge/SiGe/Ge stack on Si, room temperature...

Full description

Bibliographic Details
Main Authors: Ahmad Abedin, Laura Zurauskaite, A. Asadollahi, Konstantinos Garidis, Ganesh Jayakumar, B. Gunnar Malm, Per-Erik Hellstrom, Mikael Ostling
Format: Article
Language:English
Published: IEEE 2018-01-01
Series:IEEE Journal of the Electron Devices Society
Subjects:
GOI
wafer bonding
selective etching
GOI MOSFET
3D integration
Online Access:https://ieeexplore.ieee.org/document/8279445/

Internet

https://ieeexplore.ieee.org/document/8279445/

Similar Items