A CMOS-Compatible Poly-Si Nanowire Device with Hybrid Sensor/Memory Characteristics for System-on-Chip Applications

This paper reports a versatile nano-sensor technology using “top-down” poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50...

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Bibliographic Details
Main Authors: Chia-Hua Ho, Fu-Liang Yang, Chien-Chao Huang, Jian-Tai Qiu, Jim-Tong Horng, Chao-Hsin Chien, Tsung-Fan Hsieh, Hao-Yu Chen, Chia-Yi Lin, Min-Cheng Chen
Format: Article
Language:English
Published: MDPI AG 2012-03-01
Series:Sensors
Subjects:
Online Access:http://www.mdpi.com/1424-8220/12/4/3952/