A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

This paper presents a ferroelectric FET (FeFET)-based processing-in-memory (PIM) architecture to accelerate the inference of deep neural networks (DNNs). We propose a digital in-memory vector-matrix multiplication (VMM) engine design utilizing the FeFET crossbar to enable bit-parallel computation an...

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Bibliographic Details
Main Authors: Yun Long, Daehyun Kim, Edward Lee, Priyabrata Saha, Burhan Ahmad Mudassar, Xueyuan She, Asif Islam Khan, Saibal Mukhopadhyay
Format: Article
Language:English
Published: IEEE 2019-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Online Access:https://ieeexplore.ieee.org/document/8740886/