Fixed‐latency architecture for multi‐stage algebraic interleavers in interleave division multiple access systems
Abstract In this letter, a fixed‐latency interleaver architecture is proposed for interleave division multiple access (IDMA) systems. The existing multi‐stage algebraic interleaver suffers from the high latency originated from a series of multipliers and adders residing in each stage. In contrast, t...
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| Format: | Article |
| Language: | English |
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Wiley
2022-10-01
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| Series: | Electronics Letters |
| Online Access: | https://doi.org/10.1049/ell2.12627 |