Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator
Abstract Soft error resilience has become an essential design metric in electronic computing systems as advanced technology nodes have become less robust to high‐charged particle effects. Designers, therefore, should be able to assess this metric considering several software stack components running...
| Main Authors: | , , , , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Hindawi-IET
2021-03-01
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| Series: | IET Computers & Digital Techniques |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/cdt2.12017 |