Synthesis of FPGA architectures of block lifting-based filter banks in quaternion algebra (part 2)
Nowadays the methodology for designing systems on a chip is based on highly parameterized IP (itellectual property) components which provide a wide range of adjustment of resources, fixed point arithmetic data formats, and system performance for a specific application. The article desc...
| Main Authors: | , |
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| Format: | Article |
| Language: | Russian |
| Published: |
The United Institute of Informatics Problems of the National Academy of Sciences of Belarus
2018-09-01
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| Series: | Informatika |
| Subjects: | |
| Online Access: | https://inf.grid.by/jour/article/view/422 |