Source Code Verification for Embedded Systems using Prolog
System relevant embedded software needs to be reliable and, therefore, well tested, especially for aerospace systems. A common technique to verify programs is the analysis of their abstract syntax tree (AST). Tree structures can be elegantly analyzed with the logic programming language Prolog. More...
| Main Authors: | , , , |
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| Format: | Article |
| Language: | English |
| Published: |
Open Publishing Association
2017-01-01
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| Series: | Electronic Proceedings in Theoretical Computer Science |
| Online Access: | http://arxiv.org/pdf/1701.00630v1 |