A 1.2 V high‐speed low‐power preamplifier latch‐based comparator
Abstract The power consumption of chips has emerged as a major concern with the increased integration of analog circuitry. This work focuses on a two‐stage comparator based on a preamplifier with latch for a successive approximation analog‐to‐digital converter. In order to minimize power loss and de...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2022-11-01
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| Series: | Electronics Letters |
| Online Access: | https://doi.org/10.1049/ell2.12636 |