Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer
We report the effect of zirconium oxide (ZrO2) layers on the electrical characteristics of multilayered tin disulfide (SnS2) formed by atomic layer deposition (ALD) at low temperatures. SnS2 is a two-dimensional (2D) layered material which exhibits a promising electrical characteristics as a channel...
Main Authors: | , , , , , , , , , , |
---|---|
Format: | Article |
Language: | English |
Published: |
AIP Publishing LLC
2017-02-01
|
Series: | AIP Advances |
Online Access: | http://dx.doi.org/10.1063/1.4977887 |
_version_ | 1818369293262258176 |
---|---|
author | Juhyun Lee Jeongsu Lee Giyul Ham Seokyoon Shin Joohyun Park Hyeongsu Choi Seungjin Lee Juyoung Kim Onejae Sul Seungbeck Lee Hyeongtag Jeon |
author_facet | Juhyun Lee Jeongsu Lee Giyul Ham Seokyoon Shin Joohyun Park Hyeongsu Choi Seungjin Lee Juyoung Kim Onejae Sul Seungbeck Lee Hyeongtag Jeon |
author_sort | Juhyun Lee |
collection | DOAJ |
description | We report the effect of zirconium oxide (ZrO2) layers on the electrical characteristics of multilayered tin disulfide (SnS2) formed by atomic layer deposition (ALD) at low temperatures. SnS2 is a two-dimensional (2D) layered material which exhibits a promising electrical characteristics as a channel material for field-effect transistors (FETs) because of its high mobility, good on/off ratio and low temperature processability. In order to apply these 2D materials to large-scale and flexible electronics, it is essential to develop processes that are compatible with current electronic device manufacturing technology which should be conducted at low temperatures. Here, we deposited a crystalline SnS2 at 150 °C using ALD, and we then annealed at 300 °C. X-ray diffraction (XRD) and Raman spectroscopy measurements before and after the annealing showed that SnS2 had a hexagonal (001) peak at 14.9° and A1g mode at 313 cm−1. The annealed SnS2 exhibited clearly a layered structure confirmed by the high resolution transmission electron microscope (HRTEM) images. Back-gate FETs with SnS2 channel sandwiched by top and bottom ZrO2 on p++Si/SiO2 substrate were suggested to improve electrical characteristics. We used a bottom ZrO2 layer to increase adhesion between the channel and the substrate and a top ZrO2 layer to improve contact property, passivate surface, and protect from process-induced damages to the channel. ZTZ (ZrO2/SnS2/ZrO2) FETs showed improved electrical characteristics with an on/off ratio of from 0.39×103 to 6.39×103 and a mobility of from 0.0076 cm2/Vs to 0.06 cm2/Vs. |
first_indexed | 2024-12-13T23:21:32Z |
format | Article |
id | doaj.art-fb17744620934694a2db29097c57153c |
institution | Directory Open Access Journal |
issn | 2158-3226 |
language | English |
last_indexed | 2024-12-13T23:21:32Z |
publishDate | 2017-02-01 |
publisher | AIP Publishing LLC |
record_format | Article |
series | AIP Advances |
spelling | doaj.art-fb17744620934694a2db29097c57153c2022-12-21T23:27:44ZengAIP Publishing LLCAIP Advances2158-32262017-02-0172025311025311-610.1063/1.4977887064702ADVImproved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layerJuhyun Lee0Jeongsu Lee1Giyul Ham2Seokyoon Shin3Joohyun Park4Hyeongsu Choi5Seungjin Lee6Juyoung Kim7Onejae Sul8Seungbeck Lee9Hyeongtag Jeon10Division of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDepartment of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDepartment of Nanoscale Semiconductor Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaDepartment of Electronic Engineering, Hanyang University, Seoul, South KoreaInstitute of Nano Science and Technology, Hanyang University, Seoul, South KoreaDepartment of Electronic Engineering, Hanyang University, Seoul, South KoreaDivision of Materials Science and Engineering, Hanyang University, Seoul, South KoreaWe report the effect of zirconium oxide (ZrO2) layers on the electrical characteristics of multilayered tin disulfide (SnS2) formed by atomic layer deposition (ALD) at low temperatures. SnS2 is a two-dimensional (2D) layered material which exhibits a promising electrical characteristics as a channel material for field-effect transistors (FETs) because of its high mobility, good on/off ratio and low temperature processability. In order to apply these 2D materials to large-scale and flexible electronics, it is essential to develop processes that are compatible with current electronic device manufacturing technology which should be conducted at low temperatures. Here, we deposited a crystalline SnS2 at 150 °C using ALD, and we then annealed at 300 °C. X-ray diffraction (XRD) and Raman spectroscopy measurements before and after the annealing showed that SnS2 had a hexagonal (001) peak at 14.9° and A1g mode at 313 cm−1. The annealed SnS2 exhibited clearly a layered structure confirmed by the high resolution transmission electron microscope (HRTEM) images. Back-gate FETs with SnS2 channel sandwiched by top and bottom ZrO2 on p++Si/SiO2 substrate were suggested to improve electrical characteristics. We used a bottom ZrO2 layer to increase adhesion between the channel and the substrate and a top ZrO2 layer to improve contact property, passivate surface, and protect from process-induced damages to the channel. ZTZ (ZrO2/SnS2/ZrO2) FETs showed improved electrical characteristics with an on/off ratio of from 0.39×103 to 6.39×103 and a mobility of from 0.0076 cm2/Vs to 0.06 cm2/Vs.http://dx.doi.org/10.1063/1.4977887 |
spellingShingle | Juhyun Lee Jeongsu Lee Giyul Ham Seokyoon Shin Joohyun Park Hyeongsu Choi Seungjin Lee Juyoung Kim Onejae Sul Seungbeck Lee Hyeongtag Jeon Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer AIP Advances |
title | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer |
title_full | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer |
title_fullStr | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer |
title_full_unstemmed | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer |
title_short | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO2 layer |
title_sort | improved electrical properties of atomic layer deposited tin disulfide at low temperatures using zro2 layer |
url | http://dx.doi.org/10.1063/1.4977887 |
work_keys_str_mv | AT juhyunlee improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT jeongsulee improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT giyulham improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT seokyoonshin improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT joohyunpark improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT hyeongsuchoi improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT seungjinlee improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT juyoungkim improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT onejaesul improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT seungbecklee improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer AT hyeongtagjeon improvedelectricalpropertiesofatomiclayerdepositedtindisulfideatlowtemperaturesusingzro2layer |