Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache

Defending Against Flush+Reload Attack With DRAM Cache by Bypassing Shared SRAM Cache

Cache side-channel attack is one of the critical security threats to modern computing systems. As a representative cache side-channel attack, Flush+Reload attack allows an attacker to steal confidential information (e.g., private encryption key) by monitoring a victim's cache access patterns wh...

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Bibliographic Details
Main Authors: Minwoo Jang, Seungkyu Lee, Jaeha Kung, Daehoon Kim
Format: Article
Language:English
Published: IEEE 2020-01-01
Series:IEEE Access
Subjects:
Flush+Reload attack
DRAM cache architecture
cache side channel attack
cache architecture
Online Access:https://ieeexplore.ieee.org/document/9210067/

Internet

https://ieeexplore.ieee.org/document/9210067/

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