Verification of serialising instructions for security against transient execution attacks

Verification of serialising instructions for security against transient execution attacks

Abstract Transient execution attacks such as Spectre and Meltdown exploit speculative execution in modern microprocessors to leak information via cache side‐channels. Software solutions to defend against many transient execution attacks employ the lfence serialising instruction, which does not allow...

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Bibliographic Details
Main Authors: Kushal K. Ponugoti, Sudarshan K. Srinivasan, Nimish Mathure
Format: Article
Language:English
Published: Wiley 2023-07-01
Series:IET Computers & Digital Techniques
Subjects:
computer architecture
electronic design automation
formal verification
integrated circuit design
logic design
microcomputers
Online Access:https://doi.org/10.1049/cdt2.12058

Internet

https://doi.org/10.1049/cdt2.12058

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