Fluorine-Based Low-Damage Selective Etching Process for E-Mode p-GaN/AlGaN/GaN HFET Fabrication

In this study, we conducted an optimization of a low-damage selective etching process utilizing inductively coupled plasma-reactive ion etch (ICP-RIE) with a fluorine-based gas mixture. This optimization was carried out for the fabrication of p-GaN gated AlGaN/GaN enhancement-mode (E-mode) heterojun...

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Bibliographic Details
Main Authors: Hyeon-Ji Kim, Jun-Hyeok Yim, Hyungtak Kim, Ho-Young Cha
Format: Article
Language:English
Published: MDPI AG 2023-10-01
Series:Electronics
Subjects:
Online Access:https://www.mdpi.com/2079-9292/12/20/4347
Description
Summary:In this study, we conducted an optimization of a low-damage selective etching process utilizing inductively coupled plasma-reactive ion etch (ICP-RIE) with a fluorine-based gas mixture. This optimization was carried out for the fabrication of p-GaN gated AlGaN/GaN enhancement-mode (E-mode) heterojunction field-effect transistors (HFETs). The optimum process conditions resulted in an etch selectivity of 21:1 (=p-GaN:Al<sub>0.2</sub>Ga<sub>0.8</sub>N) with a p-GaN etch rate of 5.2 nm/min and an AlGaN etch rate of 0.25 nm/min. In comparison with an oxygen-based selective etching process, the fluorine-based selective etching process demonstrated reduced damage to the etched surface. This was confirmed through current–voltage characteristics and surface roughness inspections. The p-GaN gated AlGaN/GaN E-mode device, fabricated using the optimized fluorine-based selective etching process, achieved a high threshold voltage of 3.5 V with a specific on-resistance of 5.3 mΩ.cm<sup>2</sup> for the device and with a gate-to-p-GaN gate distance of 3 μm, a p-GaN gate length of 4 μm, and a p-GaN gate-to-drain distance of 12 μm. The catastrophic breakdown voltage exceeded 1350 V.
ISSN:2079-9292