Desat Protection With Ultrafast Response for High-Voltage SiC MOSFETs With High <italic>dv&#x002F;dt</italic>

This article presents a desat protection scheme with the ultrafast response for high-voltage (&gt;3.3 kV) SiC MOSFETs. Its working principle is the same as the conventional desat protection designed for high-voltage SiC MOSFETs, yet its blanking time is implemented by fully considering the influ...

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Bibliographic Details
Main Authors: Xingxuan Huang, Dingrui Li, Min Lin, Leon M. Tolbert, Fred Wang, William Giewont
Format: Article
Language:English
Published: IEEE 2024-01-01
Series:IEEE Open Journal of Industry Applications
Subjects:
Online Access:https://ieeexplore.ieee.org/document/10411019/
Description
Summary:This article presents a desat protection scheme with the ultrafast response for high-voltage (&gt;3.3 kV) SiC MOSFETs. Its working principle is the same as the conventional desat protection designed for high-voltage SiC MOSFETs, yet its blanking time is implemented by fully considering the influence of high negative <italic>dv<sub>ds</sub>&#x002F;dt</italic> during the fast turn-<sc>on</sc> transient. With the same circuitry as the conventional desat protection, the proposed protection scheme can significantly shorten the response time of the desat protection when it is used to protect high-voltage SiC MOSFETs. In addition, the proposed protection scheme with ultrafast response features strong noise immunity, low-cost, and simple implementation. By taking advantage of the high <italic>dv&#x002F;dt</italic> during the normal turn-<sc>on</sc> transients, the proposed protection scheme can be even faster when the MOSFET has a faster switching speed. Design details and the response speed analysis under various short circuit faults are presented in detail. A half bridge phase leg based on discrete 10 kV&#x002F;20 A SiC MOSFETs is built to demonstrate the proposed protection scheme. Experimental results at 6.5 kV validate the ultrafast response (115 ns response time under a hard switching fault, 155 ns response time under a fault under load), and strong noise immunity of the proposed desat protection scheme.
ISSN:2644-1241