High-Performance Memory Allocation on FPGA With Reduced Internal Fragmentation

High-Performance Memory Allocation on FPGA With Reduced Internal Fragmentation

In this paper, we present two distinct hardware dynamic memory allocation schemes that are based on the binary buddy system algorithm. Our aim is to mitigate internal fragmentation without impacting the area and performance of the system. The first scheme introduces a parallel design for calculating...

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Bibliographic Details
Main Authors: Mohamad Mehdi Sadeghi, Somayeh Timarchi, Mahmood Fazlali
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Access
Subjects:
Dynamic memory allocator
field programmable gate array (FPGA)
high-performance
internal fragmentation
Online Access:https://ieeexplore.ieee.org/document/10164079/

Internet

https://ieeexplore.ieee.org/document/10164079/

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