Design Exploration of 14 nm FinFET for Energy-Efficient Cryogenic Computing

Design Exploration of 14 nm FinFET for Energy-Efficient Cryogenic Computing

Cryogenic operation of CMOS transistors (i.e., cryo-CMOS) effectively brings an ultrasteep subthreshold slope (SS) and ultralow leakage, enabling high energy efficiency with appropriate tuning of threshold voltage and supply voltage. On the other hand, cryo-CMOS suffers from elevated sensitivity to...

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Bibliographic Details
Main Authors: Amol D. Gaidhane, Rakshith Saligram, Wriddhi Chakraborty, Suman Datta, Arijit Raychowdhury, Yu Cao
Format: Article
Language:English
Published: IEEE 2023-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Cryogenic temperatures
energy-efficient computing
FinFET
predictive modeling
variations
Online Access:https://ieeexplore.ieee.org/document/10310237/

Internet

https://ieeexplore.ieee.org/document/10310237/

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