Power Performance Analysis of Digital Standard Cells for 28 nm Bulk CMOS at Cryogenic Temperature Using BSIM Models

Cryogenic CMOS is a crucial component in building scalable quantum computers, predominantly for interface and control circuitry. Further, high-performance computing can also benefit from cryogenic boosters. This necessitates an in-depth understanding of the power and performance trade-offs in the cr...

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Bibliographic Details
Main Authors: Rakshith Saligram, Wriddhi Chakraborty, Ningyuan Cao, Yu Cao, Suman Datta, Arijit Raychowdhury
Format: Article
Language:English
Published: IEEE 2021-01-01
Series:IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Subjects:
Online Access:https://ieeexplore.ieee.org/document/9627705/