Low-overhead hard real-time aware interconnect network router

The increasing complexity of embedded systems is accelerating the use of multicore processors in these systems. This trend gives rise to new problems such as the sharing of on-chip network resources among hard real-time and normal best effort data traffic. We propose a network-on-chip router that pr...

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Bibliographic Details
Main Authors: Kinsy, Michel A., Devadas, Srinivas
Other Authors: Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers (IEEE) 2015
Online Access:http://hdl.handle.net/1721.1/100011
https://orcid.org/0000-0001-8253-7714