Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications
This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and insid...
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2017
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Online Access: | http://hdl.handle.net/1721.1/109929 |
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author | Chou, Po-Chien Chen, Szu-Hao Hsieh, Ting-En Cheng, Stone Chang, Edward del Alamo, Jesus A |
author2 | Massachusetts Institute of Technology. Microsystems Technology Laboratories |
author_facet | Massachusetts Institute of Technology. Microsystems Technology Laboratories Chou, Po-Chien Chen, Szu-Hao Hsieh, Ting-En Cheng, Stone Chang, Edward del Alamo, Jesus A |
author_sort | Chou, Po-Chien |
collection | MIT |
description | This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments. |
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format | Article |
id | mit-1721.1/109929 |
institution | Massachusetts Institute of Technology |
language | en_US |
last_indexed | 2024-09-23T16:54:29Z |
publishDate | 2017 |
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spelling | mit-1721.1/1099292022-09-29T22:21:59Z Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications Chou, Po-Chien Chen, Szu-Hao Hsieh, Ting-En Cheng, Stone Chang, Edward del Alamo, Jesus A Massachusetts Institute of Technology. Microsystems Technology Laboratories del Alamo, Jesus A This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments. 2017-06-16T13:16:23Z 2017-06-16T13:16:23Z 2017-02 2016-12 Article http://purl.org/eprint/type/JournalArticle 1996-1073 http://hdl.handle.net/1721.1/109929 Chou, Po-Chien; Chen, Szu-Hao; Hsieh, Ting-En; Cheng, Stone; del Alamo, Jesus and Chang, Edward. “Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications.” Energies 10, no. 2 (February 2017): 233 © 2017 The Authors en_US http://dx.doi.org/10.3390/en10020233 Energies Creative Commons Attribution 4.0 International License http://creativecommons.org/licenses/by/4.0/ application/pdf MDPI AG MDPI |
spellingShingle | Chou, Po-Chien Chen, Szu-Hao Hsieh, Ting-En Cheng, Stone Chang, Edward del Alamo, Jesus A Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title | Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title_full | Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title_fullStr | Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title_full_unstemmed | Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title_short | Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications |
title_sort | evaluation and reliability assessment of gan on si mis hemt for power switching applications |
url | http://hdl.handle.net/1721.1/109929 |
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