Nanofabrication of arrays of silicon field emitters with vertical silicon nanowire current limiters and self-aligned gates

We developed a fabrication process for embedding a dense array (10⁸cm⁻²) of high-aspect-ratio silicon nanowires (200 nm diameter and 10 μm tall) in a dielectric matrix and then structured/exposed the tips of the nanowires to form self-aligned gate field emitter arrays using chemical mechanical polis...

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Bibliographic Details
Main Authors: Guerrera, Stephen, Akinwande, Akintunde I
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: IOP Publishing 2017
Online Access:http://hdl.handle.net/1721.1/110709
https://orcid.org/0000-0003-3946-2862
https://orcid.org/0000-0003-3001-9223