Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process
The integration of III-V semiconductors (e.g., GaAs and GaN) and silicon-on-insulator (SOI)-CMOS on a 200mm Si substrate is demonstrated. The SOI-CMOS donor wafer is temporarily bonded on a Si handle wafer and thinned down. A second GaAs/Ge/Si substrate is then bonded to the SOI-CMOS-containing hand...
| Main Authors: | , , , , , |
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| Other Authors: | |
| Format: | Article |
| Language: | English |
| Published: |
Japan Society of Applied Physics
2020
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| Online Access: | https://hdl.handle.net/1721.1/124355 |