Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP

Modern out-of-order processors have increased capacity to exploit instruction level parallelism (ILP) and memory level parallelism (MLP), e.g., by using wide superscalar pipelines and vector execution units, as well as deep buffers for inflight memory requests. These resources, however, often exhibi...

Бүрэн тодорхойлолт

Номзүйн дэлгэрэнгүй
Үндсэн зохиолчид: Kiriansky, Vladimir, Xu, Haoran, Rinard, Martin, Amarasinghe, Saman
Бусад зохиолчид: Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Формат: Өгүүллэг
Хэл сонгох:English
Хэвлэсэн: Association of Computing Machinery 2020
Онлайн хандалт:https://hdl.handle.net/1721.1/125080