Extending hardware transactional memory capacity via rollback-only transactions and suspend/resume
Abstract Transactional memory (TM) aims at simplifying concurrent programming via the familiar abstraction of atomic transactions. Recently, Intel and IBM have integrated hardware based TM (HTM) implementations in commodity processors, paving the way for the mainstream adoption of the TM paradigm....
Main Authors: | , , , |
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Other Authors: | |
Format: | Article |
Language: | English |
Published: |
Springer Berlin Heidelberg
2021
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Online Access: | https://hdl.handle.net/1721.1/131299 |