Fault Tolerance in Packet Communication Computer Archiectures

It is attractive to implement a large scale parallel processing system as a self-timed hardware system with decentralized control and to improve maintainability and availability in such a system through fault tolerance. In this thesis we show how to tolerate hardware failures in a self-timed hardwa...

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Bibliographic Details
Main Author: Leung, Clement Kin Cho
Other Authors: Dennis, Jack B.
Published: 2023
Online Access:https://hdl.handle.net/1721.1/149531
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author Leung, Clement Kin Cho
author2 Dennis, Jack B.
author_facet Dennis, Jack B.
Leung, Clement Kin Cho
author_sort Leung, Clement Kin Cho
collection MIT
description It is attractive to implement a large scale parallel processing system as a self-timed hardware system with decentralized control and to improve maintainability and availability in such a system through fault tolerance. In this thesis we show how to tolerate hardware failures in a self-timed hardware system with a packet communication architecture, designed to execute parallel programs organized by data flow concepts.
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institution Massachusetts Institute of Technology
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spelling mit-1721.1/1495312023-03-30T03:43:10Z Fault Tolerance in Packet Communication Computer Archiectures Leung, Clement Kin Cho Dennis, Jack B. It is attractive to implement a large scale parallel processing system as a self-timed hardware system with decentralized control and to improve maintainability and availability in such a system through fault tolerance. In this thesis we show how to tolerate hardware failures in a self-timed hardware system with a packet communication architecture, designed to execute parallel programs organized by data flow concepts. 2023-03-29T15:04:51Z 2023-03-29T15:04:51Z 1980-12 https://hdl.handle.net/1721.1/149531 7096129 MIT-LCS-TR-250 application/pdf
spellingShingle Leung, Clement Kin Cho
Fault Tolerance in Packet Communication Computer Archiectures
title Fault Tolerance in Packet Communication Computer Archiectures
title_full Fault Tolerance in Packet Communication Computer Archiectures
title_fullStr Fault Tolerance in Packet Communication Computer Archiectures
title_full_unstemmed Fault Tolerance in Packet Communication Computer Archiectures
title_short Fault Tolerance in Packet Communication Computer Archiectures
title_sort fault tolerance in packet communication computer archiectures
url https://hdl.handle.net/1721.1/149531
work_keys_str_mv AT leungclementkincho faulttoleranceinpacketcommunicationcomputerarchiectures