Fault Tolerance in Packet Communication Computer Archiectures

Fault Tolerance in Packet Communication Computer Archiectures

It is attractive to implement a large scale parallel processing system as a self-timed hardware system with decentralized control and to improve maintainability and availability in such a system through fault tolerance. In this thesis we show how to tolerate hardware failures in a self-timed hardwa...

Detaylı Bibliyografya
Yazar:	Leung, Clement Kin Cho
Diğer Yazarlar:	Dennis, Jack B.
Baskı/Yayın Bilgisi:	2023
Online Erişim:	https://hdl.handle.net/1721.1/149531

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