Compaction with Automatic Job Introduction

This thesis presents an algorithm for one-dimensional compaction of VLSI layouts. It differs from older methods in treating wires not as objects to be moved, but as constraints on the positions of other circuit components. These constraints are determined for each wiring layer using the theory of...

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书目详细资料
主要作者: Maley, F. Miller
其他作者: Leiserson, Charles E.
出版: 2023
在线阅读:https://hdl.handle.net/1721.1/149639