Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits
Vacuum transistors (VTs) are promising candidates in electronics due to their fast response and ability to function in harsh environments. In this study, several oscillator and logic gate circuit simulations using VTs are demonstrated. Silicon-gated field emitter arrays (Si-GFEAs) with 1000 &tim...
| Main Authors: | , , , , , |
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| Other Authors: | |
| Format: | Article |
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Multidisciplinary Digital Publishing Institute
2023
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| Online Access: | https://hdl.handle.net/1721.1/153161 |
| _version_ | 1826209562324107264 |
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| author | Hay, Robert Bhattacharya, Ranajoy Chern, Winston Rughoobur, Girish Akinwande, Akintunde I. Browning, Jim |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Hay, Robert Bhattacharya, Ranajoy Chern, Winston Rughoobur, Girish Akinwande, Akintunde I. Browning, Jim |
| author_sort | Hay, Robert |
| collection | MIT |
| description | Vacuum transistors (VTs) are promising candidates in electronics due to their fast response and ability to function in harsh environments. In this study, several oscillator and logic gate circuit simulations using VTs are demonstrated. Silicon-gated field emitter arrays (Si-GFEAs) with 1000 × 1000 arrays were used experimentally to create a VT model. First, transfer and output characteristics sweeps were measured, and based on those data, an LTspice vacuum transistor (VT) model was developed. Then, the model was used to develop Wein and Ring oscillator circuits. The circuits were analytically simulated using LTspice, where the collector bias voltage was 200 V DC, and the gate bias voltage was 30–40 V DC. The Wein oscillator circuit produced a frequency of 102 kHz with a magnitude of 26 Vpp. The Ring oscillator produced a frequency of 1.14 MHz with a magnitude of 4 Vpp. Furthermore, two logic circuits, NOR and NAND gates, were also demonstrated using LTspice modeling. These simulation results illustrate the feasibility of integrating VTs into functional integrated circuits and provide a design approach for future on-chip vacuum transistors applied in logic or radio-frequency (RF) devices. |
| first_indexed | 2024-09-23T14:24:40Z |
| format | Article |
| id | mit-1721.1/153161 |
| institution | Massachusetts Institute of Technology |
| last_indexed | 2024-09-23T14:24:40Z |
| publishDate | 2023 |
| publisher | Multidisciplinary Digital Publishing Institute |
| record_format | dspace |
| spelling | mit-1721.1/1531612024-01-05T20:48:52Z Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits Hay, Robert Bhattacharya, Ranajoy Chern, Winston Rughoobur, Girish Akinwande, Akintunde I. Browning, Jim Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Vacuum transistors (VTs) are promising candidates in electronics due to their fast response and ability to function in harsh environments. In this study, several oscillator and logic gate circuit simulations using VTs are demonstrated. Silicon-gated field emitter arrays (Si-GFEAs) with 1000 × 1000 arrays were used experimentally to create a VT model. First, transfer and output characteristics sweeps were measured, and based on those data, an LTspice vacuum transistor (VT) model was developed. Then, the model was used to develop Wein and Ring oscillator circuits. The circuits were analytically simulated using LTspice, where the collector bias voltage was 200 V DC, and the gate bias voltage was 30–40 V DC. The Wein oscillator circuit produced a frequency of 102 kHz with a magnitude of 26 Vpp. The Ring oscillator produced a frequency of 1.14 MHz with a magnitude of 4 Vpp. Furthermore, two logic circuits, NOR and NAND gates, were also demonstrated using LTspice modeling. These simulation results illustrate the feasibility of integrating VTs into functional integrated circuits and provide a design approach for future on-chip vacuum transistors applied in logic or radio-frequency (RF) devices. 2023-12-14T16:12:50Z 2023-12-14T16:12:50Z 2023-11-29 2023-12-08T15:10:45Z Article http://purl.org/eprint/type/JournalArticle https://hdl.handle.net/1721.1/153161 Applied Sciences 13 (23): 12807 (2023) PUBLISHER_CC http://dx.doi.org/10.3390/app132312807 Creative Commons Attribution https://creativecommons.org/licenses/by/4.0/ application/pdf Multidisciplinary Digital Publishing Institute Multidisciplinary Digital Publishing Institute |
| spellingShingle | Hay, Robert Bhattacharya, Ranajoy Chern, Winston Rughoobur, Girish Akinwande, Akintunde I. Browning, Jim Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title | Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title_full | Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title_fullStr | Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title_full_unstemmed | Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title_short | Simulation Modelling of Silicon Gated Field Emitter Based Electronic Circuits |
| title_sort | simulation modelling of silicon gated field emitter based electronic circuits |
| url | https://hdl.handle.net/1721.1/153161 |
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