Feasibility of Vector Instruction-Set Semantics Using Abstract Monads
Formalizations of instruction-set semantics help establish formal proofs of correctness of both hardware designed to implement these instruction sets and the software implemented against this specification. One such prior work1 formalizes a specification of a subset of the RISC-V instruction-set arc...
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Massachusetts Institute of Technology
2024
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| Online Access: | https://hdl.handle.net/1721.1/157232 |