Scalar Operand Networks: Design, Implementation, and Analysis
The bypass paths and multiported register files in microprocessors serve as an implicit interconnect tocommunicate operand values among pipeline stages and multiple ALUs. Previous superscalar designs implementedthis interconnect using centralized structures that do not scale with increasing ILP dema...
| Main Authors: | , , , |
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| Other Authors: | |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://hdl.handle.net/1721.1/30477 |