Global partitioning of parallel loops and data arrays for caches and distributed memory in multiprocessors

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.

Bibliographic Details
Main Author:	Barua, Rajeev K. (Rajeev Kumar)
Other Authors:	A. Agarwal.
Format:	Thesis
Language:	eng
Published:	Massachusetts Institute of Technology 2007
Subjects:	Electrical Engineering and Computer Science
Online Access:	http://hdl.handle.net/1721.1/36455

Internet

http://hdl.handle.net/1721.1/36455