A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder

A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder

The H.264/AVC video coding standard can deliver high compression efficiency at a cost of increased complexity and power. The increasing popularity of video capture and playback on portable devices requires that the power of the video codec be kept to a minimum. This work implements several architect...

Full description

Bibliographic Details
Main Authors: Finchelstein, Daniel Frederic, Sze, Vivienne, Sinangil, Mahmut Ersin, Chandrakasan, Anantha P.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers 2010
Subjects:
low-power electronics
cache memories
SRAM chips
Video codecs
H.264/AVC
CMOS memory circuits
CMOS digital integrated circuits
Online Access:http://hdl.handle.net/1721.1/55361
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-4841-3990

Internet

http://hdl.handle.net/1721.1/55361
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-4841-3990

Similar Items