A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction

A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction

With the adoption of ultra regular fabric paradigms for controlling design printability at the 22 nm node and beyond, there is an emerging need for a layout-driven, pattern-based parasitic extraction of alternative fabric layouts. In this paper, we propose a hierarchical floating random walk (HFRW)...

Full description

Bibliographic Details
Main Authors: El-Moselhy, Tarek Ali, Elfadel, Ibrahim M., Daniel, Luca
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers 2010
Subjects:
Markov processes
boundary-elements methods
capacitance
integrated circuit layout
3D capacitance extraction
Markov transition matrices
boundary element method
hierarchical domain decomposition
hierarchical floating random walk algorithm
parasitic extraction
size 22 nm
Online Access:http://hdl.handle.net/1721.1/59352
https://orcid.org/0000-0002-5880-3151

Internet

http://hdl.handle.net/1721.1/59352
https://orcid.org/0000-0002-5880-3151

Similar Items