Photonic integration in a commercial scaled bulk-CMOS process

Photonic integration in a commercial scaled bulk-CMOS process

We demonstrate the first photonic chip designed for a commercial bulk CMOS process (65 nm-node) using standard process layers combined with post-processing, enabling dense photonic integration with high-performance microprocessor electronics.

Bibliographic Details
Main Authors: Kaertner, Franz X., Orcutt, Jason Scott, Khilo, Anatol M., Popovic, M. A., Holzwarth, Charles W., Li, Hanqing, Sun, J., Moss, Benjamin Roy, Dahlem, Marcus Vinicius Sobral, Ippen, Erich P., Hoyt, Judy L., Stojanovic, Vladimir Marko, Smith, Henry Ignatius, Ram, Rajeev J.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers 2010
Online Access:http://hdl.handle.net/1721.1/60061
https://orcid.org/0000-0002-0259-5541
https://orcid.org/0000-0001-8690-231X
https://orcid.org/0000-0002-8733-2555
https://orcid.org/0000-0002-6032-8636
https://orcid.org/0000-0003-0420-2235
https://orcid.org/0000-0002-8048-0678

Internet

http://hdl.handle.net/1721.1/60061
https://orcid.org/0000-0002-0259-5541
https://orcid.org/0000-0001-8690-231X
https://orcid.org/0000-0002-8733-2555
https://orcid.org/0000-0002-6032-8636
https://orcid.org/0000-0003-0420-2235
https://orcid.org/0000-0002-8048-0678

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