Optimization of transistors for very high frequency dc-dc converters

Optimization of transistors for very high frequency dc-dc converters

This document presents a method to optimize integrated LDMOS transistors for use in very high frequency (VHF, 30-300 MHz) dc-dc converters. A transistor model valid at VHF switching frequencies is developed. Device parameters are related to layout geometry and the resulting layout vs. loss tradeoffs...

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Bibliographic Details
Main Authors: Perreault, David J., Sagneri, Anthony D., Anderson, David I.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers 2010
Online Access:http://hdl.handle.net/1721.1/60259
https://orcid.org/0000-0002-0746-6191

Internet

http://hdl.handle.net/1721.1/60259
https://orcid.org/0000-0002-0746-6191

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