Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis

The impact of process variation in deep-submicron technologies is especially pronounced for SRAM architectures which must meet demands for higher density and higher performance at increased levels of integration. Due to the complex structure of SRAM, estimating the effect of process variation accura...

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Main Authors: Qazi, Masood, Tikeka, Mehul, Dolecek, Lara, Shah, Devavrat, Chandrakasan, Anantha P.
Other Authors: Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Format: Article
Language:en_US
Published: Institute of Electrical and Electronics Engineers 2011
Online Access:http://hdl.handle.net/1721.1/63115
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-0737-3259
_version_ 1826215649487093760
author Qazi, Masood
Tikeka, Mehul
Dolecek, Lara
Shah, Devavrat
Chandrakasan, Anantha P.
author2 Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
author_facet Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Qazi, Masood
Tikeka, Mehul
Dolecek, Lara
Shah, Devavrat
Chandrakasan, Anantha P.
author_sort Qazi, Masood
collection MIT
description The impact of process variation in deep-submicron technologies is especially pronounced for SRAM architectures which must meet demands for higher density and higher performance at increased levels of integration. Due to the complex structure of SRAM, estimating the effect of process variation accurately has become very challenging. In this paper, we address this challenge in the context of estimating SRAM timing variation. Specifically, we introduce a method called loop flattening that demonstrates how the evaluation of the timing statistics in the complex, highly structured circuit can be reduced to that of a single chain of component circuits. To then very quickly evaluate the timing delay of a single chain, we employ a statistical method based on importance sampling augmented with targeted, high-dimensional, spherical sampling. Overall, our methodology provides an accurate estimation with 650X or greater speed-up over the nominal Monte Carlo approach.
first_indexed 2024-09-23T16:37:16Z
format Article
id mit-1721.1/63115
institution Massachusetts Institute of Technology
language en_US
last_indexed 2024-09-23T16:37:16Z
publishDate 2011
publisher Institute of Electrical and Electronics Engineers
record_format dspace
spelling mit-1721.1/631152022-09-29T20:22:57Z Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis Qazi, Masood Tikeka, Mehul Dolecek, Lara Shah, Devavrat Chandrakasan, Anantha P. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology. Microsystems Technology Laboratories Shah, Devavrat Shah, Devavrat Qazi, Masood Chandrakasan, Anantha P. The impact of process variation in deep-submicron technologies is especially pronounced for SRAM architectures which must meet demands for higher density and higher performance at increased levels of integration. Due to the complex structure of SRAM, estimating the effect of process variation accurately has become very challenging. In this paper, we address this challenge in the context of estimating SRAM timing variation. Specifically, we introduce a method called loop flattening that demonstrates how the evaluation of the timing statistics in the complex, highly structured circuit can be reduced to that of a single chain of component circuits. To then very quickly evaluate the timing delay of a single chain, we employ a statistical method based on importance sampling augmented with targeted, high-dimensional, spherical sampling. Overall, our methodology provides an accurate estimation with 650X or greater speed-up over the nominal Monte Carlo approach. 2011-05-25T18:11:41Z 2011-05-25T18:11:41Z 2010-04 2010-03 Article http://purl.org/eprint/type/ConferencePaper 978-1-4244-7054-9 1530-1591 INSPEC Accession Number: 11283197 http://hdl.handle.net/1721.1/63115 Qazi, M. et al. “Loop Flattening & Spherical Sampling: Highly Efficient Model Reduction Techniques for SRAM Yield Analysis.” Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010 : 801-806. © 2010 IEEE. https://orcid.org/0000-0002-5977-2748 https://orcid.org/0000-0003-0737-3259 en_US http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5456940&tag=1 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010 Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers IEEE
spellingShingle Qazi, Masood
Tikeka, Mehul
Dolecek, Lara
Shah, Devavrat
Chandrakasan, Anantha P.
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title_full Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title_fullStr Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title_full_unstemmed Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title_short Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
title_sort loop flattening spherical sampling highly efficient model reduction techniques for sram yield analysis
url http://hdl.handle.net/1721.1/63115
https://orcid.org/0000-0002-5977-2748
https://orcid.org/0000-0003-0737-3259
work_keys_str_mv AT qazimasood loopflatteningsphericalsamplinghighlyefficientmodelreductiontechniquesforsramyieldanalysis
AT tikekamehul loopflatteningsphericalsamplinghighlyefficientmodelreductiontechniquesforsramyieldanalysis
AT doleceklara loopflatteningsphericalsamplinghighlyefficientmodelreductiontechniquesforsramyieldanalysis
AT shahdevavrat loopflatteningsphericalsamplinghighlyefficientmodelreductiontechniquesforsramyieldanalysis
AT chandrakasanananthap loopflatteningsphericalsamplinghighlyefficientmodelreductiontechniquesforsramyieldanalysis