Test Generation Guided Design for Testability
This thesis presents a new approach to building a design for testability (DFT) system. The system takes a digital circuit description, finds out the problems in testing it, and suggests circuit modifications to correct those problems. The key contributions of the thesis research are (1) settin...
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| 言語: | en_US |
| 出版事項: |
2004
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| オンライン･アクセス: | http://hdl.handle.net/1721.1/6837 |