Enabling System-Level Modeling of Variation-Induced Faults in Networks-on-Chip
Process Variation (PV) is increasingly threatening the reliability of Networks-on-Chips. Thus, various resilient router designs have been recently proposed and evaluated. However, these evaluations assume random fault distributions, which result in 52%--81% inaccuracy. We propose an accurate circuit...
| Main Authors: | , , |
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| Other Authors: | |
| Format: | Article |
| Language: | en_US |
| Published: |
Association for Computing Machinery (ACM)
2012
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| Online Access: | http://hdl.handle.net/1721.1/72480 https://orcid.org/0000-0001-9010-6519 https://orcid.org/0000-0003-1284-6620 |