Performance Metrics and Empirical Results of a PUF Cryptographic Key Generation ASIC
We describe a PUF design with integrated error correction that is robust to various layout implementations and achieves excellent and consistent results in each of the following four areas: Randomness, Uniqueness, Bias and Stability. 133 PUF devices in 0.13 μm technology encompassing seven circuit l...
Main Authors: | , , , , |
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Other Authors: | |
Format: | Article |
Language: | en_US |
Published: |
Institute of Electrical and Electronics Engineers (IEEE)
2012
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Online Access: | http://hdl.handle.net/1721.1/73113 https://orcid.org/0000-0001-8253-7714 |