50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz
We have demonstrated 50-nm enhancement-mode (E-mode) In[subscript 0.7]Ga[subscript 0.3]As PHEMTs with f[subscript max] in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In[subscript 0.52]Al[subscript 0.48]As barrier layer, together with a two-step recess...
| Main Authors: | , , , , , |
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| Format: | Article |
| Language: | en_US |
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Institute of Electrical and Electronics Engineers (IEEE)
2012
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| Online Access: | http://hdl.handle.net/1721.1/73128 |
| _version_ | 1826195829363310592 |
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| author | del Alamo, Jesus A. Kim, Dae-Hyun Chen, Peter Ha, Wonill Urteaga, Miguel Brar, B. |
| author2 | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science |
| author_facet | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science del Alamo, Jesus A. Kim, Dae-Hyun Chen, Peter Ha, Wonill Urteaga, Miguel Brar, B. |
| author_sort | del Alamo, Jesus A. |
| collection | MIT |
| description | We have demonstrated 50-nm enhancement-mode (E-mode) In[subscript 0.7]Ga[subscript 0.3]As PHEMTs with f[subscript max] in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In[subscript 0.52]Al[subscript 0.48]As barrier layer, together with a two-step recess process. The fabricated device with L[subscript g] = 50-nm exhibits V[subscript T] = 0.1 V, g[subscript m,max] = 1.75 mS/μm, f[subscript T] = 465 GHz and f[subscript max] = 1.06 THz at a moderate value of V[subscript DS] = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (U[subscript g]) at high values of VDS. A revised small signal model that includes a shunting R[subscript gd-NDR] with negative value successfully describes the behavior of the device from 1 to 67 GHz. |
| first_indexed | 2024-09-23T10:16:07Z |
| format | Article |
| id | mit-1721.1/73128 |
| institution | Massachusetts Institute of Technology |
| language | en_US |
| last_indexed | 2024-09-23T10:16:07Z |
| publishDate | 2012 |
| publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| record_format | dspace |
| spelling | mit-1721.1/731282022-09-30T20:01:38Z 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz del Alamo, Jesus A. Kim, Dae-Hyun Chen, Peter Ha, Wonill Urteaga, Miguel Brar, B. Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science del Alamo, Jesus A. We have demonstrated 50-nm enhancement-mode (E-mode) In[subscript 0.7]Ga[subscript 0.3]As PHEMTs with f[subscript max] in excess of 1 THz. The devices feature a Pt gate sinking process to effectively thin down the In[subscript 0.52]Al[subscript 0.48]As barrier layer, together with a two-step recess process. The fabricated device with L[subscript g] = 50-nm exhibits V[subscript T] = 0.1 V, g[subscript m,max] = 1.75 mS/μm, f[subscript T] = 465 GHz and f[subscript max] = 1.06 THz at a moderate value of V[subscript DS] = 0.75 V. In addition, we have physically modeled the abnormal peaky behavior in Mason's unilateral gain (U[subscript g]) at high values of VDS. A revised small signal model that includes a shunting R[subscript gd-NDR] with negative value successfully describes the behavior of the device from 1 to 67 GHz. United States. Defense Advanced Research Projects Agency (Space and Naval Warfare Systems Center San Diego (U.S.)) (Contract N660001-06-C-2025) 2012-09-24T18:12:24Z 2012-09-24T18:12:24Z 2010-12 2010-12 Article http://purl.org/eprint/type/ConferencePaper 978-1-4244-7419-6 978-1-4424-7418-5 0163-1918 http://hdl.handle.net/1721.1/73128 Kim, Dae-Hyun et al. “50-nm E-mode In[subscript 0.7]IEEE International Electron Devices Meeting (IEDM), 2010. 30.6.1–30.6.4. © Copyright 2010 IEEE en_US http://dx.doi.org/10.1109/IEDM.2010.5703453 Proceedings of the IEEE International Electron Devices Meeting (IEDM), 2010 Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. application/pdf Institute of Electrical and Electronics Engineers (IEEE) IEEE |
| spellingShingle | del Alamo, Jesus A. Kim, Dae-Hyun Chen, Peter Ha, Wonill Urteaga, Miguel Brar, B. 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title | 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title_full | 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title_fullStr | 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title_full_unstemmed | 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title_short | 50-nm E-mode In[subscript 0.7]Ga[subscript 0.3]As PHEMTs on 100-mm InP substrate with f[subscript max] > 1 THz |
| title_sort | 50 nm e mode in subscript 0 7 ga subscript 0 3 as phemts on 100 mm inp substrate with f subscript max 1 thz |
| url | http://hdl.handle.net/1721.1/73128 |
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